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Section: Partnerships and Cooperations
National Initiatives
ANR
HeLP
Participants : Carlos Gomez Cardenas, Ameni Khecharem, Robert de Simone, Jean-Vivien Millo.
The ANR HeLP project dealt with joint modeling of functional behavior and energy consumption for the design of low-power heterogeneous SoCs. Partners were ST Microelectronics and Docea Power (SME) as industrial; Inria, UNS (UMR LEAT), and VERIMAG (coordinator) as academics. Our goal in this project was twofold: first, combine SoC modeling with temporal behavior and logical time with energy/power modeling as extra annotations on MARTE models; second, link the modeling abilities of MARTE with those of the domain-specific standard IP-XACT.
The project ended in April 2013, with some of its findings taken up and extended in the more recent ANR project HOPE.
HOPE
Participants : Carlos Gomez Cardenas, Ameni Khecharem, Emilien Kofman, Robert de Simone.
The ANR HOPE project focuses on hierarchical aspects for the high-level modeling and early estimation of power management techniques, with potential synthesis in the end if feasible.
The PhD defense of Carlos Gomez Cardenas was held in Dec 2013 [16] , in strong connection with the project (as a follow-up of HeLP).
Although this project was officially started in November, it was in part postponed due to the replacement of a major partner (Texas Instruments) by another one (Intel). Current partners are CNRS/UNS UMR LEAT, Intel, Synopsys, Docea Power, Magillem, and ourselves.
GeMoC
Participants : Matias Vara Larsen, Julien Deantoni, Frédéric Mallet.
This project is admistratively handled by CNRS for our joint team, on the UMR I3S side. Partners are Inria (Triskell EPI), ENSTA-Bretagne, IRIT, Obeo, Thales TRT.
The project focuses on the modeling of heterogeneous systems using Models of Computation and Communication for embedded and real-time systems, described using generic means of MDE techniques (and in our case the MARTE profile, and most specifically its Time Model, which allows to specify precise timely constraints for operational semantic definition).
FUI
FUI P
Participants : Abderraouf Benyahia, Dumitru Potop Butucaru, Yves Sorel.
The goal of project P is to support the model-driven engineering of high-integrity embedded real-time systems by providing an open code generation framework able to verify the semantic consistency of systems described using safe subsets of heterogeneous modeling languages, then to generate optimized source code for multiple programming (Ada, C/C++) and synthesis (VHDL, SystemC) languages, and finally to support a multi-domain (avionics, space, and automotive) certification process by providing open qualification material. Modeling languages range from behavioural to architectural languages and present a synchronous and asynchronous semantics (Simulink/Matlab, Scicos, Xcos, SysML, MARTE, UML),
See also: http://www.open-do.org/projects/p/
Partners of the project are: industrial partners (Airbus, Astrium, Continental, Rockwell Collins, Safran, Thales), SMEs (AdaCore, Altair, Scilab Enterprise, STI), service companies (ACG, Aboard Engineering, Atos Origins) and research centers (CNRS, ENPC, Inria, ONERA).
FUI PARSEC
Participants : Dumitru Potop Butucaru, Thomas Carle, Zhen Zhang, Yves Sorel.
The PARSEC Project aims at providing development tools for critical real-time distributed systems requiring certification according to the most stringent standards such as DO-178B (avionics), IEC 61508 (transportation) or Common Criteria for Information Technology Security Evaluation. The approach proposed by PARSEC provides an integrated toolset that helps software engineers to meet the requirements associated to the certification of critical embedded software. Partners of the project are: Alstom, Thales, Ellidiss, OpenWide, Systerel, CEA, InriaS, Telecom ParisTech.
FUI CLISTINE
Participants : Robert de Simone, Amin Oueslati, Emilien Kofman.
This contract has just been accepted, with a kick-off meeting in Dec 2013. Partners are SynergieCAD (coordinator), Avantis, Optis, and the two EPIs Aoste and Nachos. The goal is to study the feasibility of building a low-cost, low-power "supercomputer", reusing ideas from SoC design, but this time with out-of-chip network "on-board", and out-of-the-shelf processor elements organized as an array. The network itself should be time predictable and highly parallel (far more than PCI-e for instance).
Investissements d'Avenir
DEPARTS
Participants : Liliana Cucu-Grosjean, Adriana Gogonel, Codé Lo, Cristian Maxim.
This project is funded by the BGLE Call (Briques Logicielles pour le Logiciel Embarqué of the national support programme Investissements d'Avenir. Formally started on October 1st, 2012, but the kick-off meeting was only held on April, 2013 for administrative reasons. Initially this contract was handled by the TRIO team in Nancy, but at this end of TRIO moved to Aoste Rocquencourt with the people involved. Research will target solutions for probabilistic component-based models, and a Ph.D. thesis will start early 2014 on this topic. The goal is to allow designers to unify in a common framework probabilistic scheduling techniques with compositional assume/guarantee contracts that have different levels of criticality. Our contribution is based on the schedulability analysis presented in [39] .